1. Field of Utilization in Industry
The present invention relates to a wafer defect detection method and apparatus therefor, this method making use of an electron beam to perform high-sensitivity and high-speed detection of defects in the pattern formed on a wafer, and the apparatus having a configuration for the purpose of performing this detection. More specifically, the present invention relates to a method whereby an electron beam scans over the pattern, the secondary electron image or reflected electron image resulting from this scanning being compared while scanning to detect the existence or non-existence of defects, this method performing high-speed detection, while maintaining high sensitivity and detection reliability (capture rate).
2. Description of the Background Art
In the development of VLSI processes or manufacture of VLSI devices, the most basic method and essential technology for improving yield is to detect pattern defects, and to determine the cause of such defects. The dimensions of defects which are to be detected are established by the minimum dimensions of the pattern, and in general it is necessary to detect defects that are 1/2 of the minimum pattern dimension or smaller. This means that in the future there will be a need to have detection sensitivity of 0.2 .mu.m in the case of a 64M DRAM having a minimum pattern dimension of 0.4 .mu.m, and a detection sensitivity of 0.1 .mu.m in the case of a 256M DRAM having a minimum pattern dimension of 0.25 .mu.m. In fields requiring such defect detection sensitivities, it is necessary to use an electron beam. This is because the defects which must be detected are smaller than the minimum resolution obtainable using an electron microscope and obtained using light.
Next, the method of using an electron beam for detection of defects will be described as it was practiced in the prior art. This method can be generally divided into its constituent parts of image capture processing and defect detection processing, with defect detection for the purpose of fault analysis generally making use of pattern comparison. That comparison takes the form of comparing two images, one from the pattern being inspected for defects and other from the pattern of another wafer having the same pattern. If the patterns are the same, the pattern under inspection is judged to be good. If there is a difference between the pattern images, the judgment is made that there exists a defect in the pattern being inspected.
In making this comparison, the most common method is to make a comparison a pair of the patterns of dies (chips) which are arranged on both the wafers from the same area (observation screen) of each wafer, this method being known as the die-to-die method.
In the case of memory cells, in which the same patterns are line up on the wafer, the scanning proceeds sequentially as comparisons are made between adjacent patterns. Because this method compares adjacent patterns, it has a simpler scanning method and can be done faster than the die-to-die method, and there has been a recent trend towards the widespread use of this method. A slightly more detailed description of the beam scanning method and the signal detection method used in this method will be presented next (P. Sandland et al, J. Vac. Sci. Technol., B9(6), Nov/Dec, p. 3005, 1991).
FIG. 1 and FIG. 2 show the shape of the beam and the scanning method in the defect detection method of the prior art. First, a circular beam 11, which has a finite size (beam diameter R) is raster-scanned in the X direction as a stage is moved in the Y direction. As a result, the pattern on the wafer surface 21 are scanned in rectangular strips.
In doing this, as shown in FIG. 2, a specific chip 22 on the wafer surface 21 is scanned by the beam 11. This example is that of three chips, 22a through 22c, to be inspected, these being scanned together. That is, by moving the stage in the Y direction while scanning the beam in the X direction, the beam is moved through the sawtooth path having the desired width, which is shown by the arrow line 25, thereby scanning over a rectangular strip. The scanned region covered on the overall chip in a back-and-forth movement as shown by the arrow line 26, thereby enabling the scanning of the entire chip surface.
The beam diameter R is required to be 0.1 .mu.m if the required defect detection sensitivity is 0.1 .mu.m. A signal which is synchronized to the raster scanning of the beam 11 is output every pitch .DELTA.X, that is, every 0.1 .mu.m in this example, and this signal captures one pixel, which an image is formed. If we assume that 100% of the surface of the wafer 21 is to be covered, with no skipped areas, the Y-direction pitch .DELTA.Y is also established by the beam diameter R, and in this example this 0.1 .mu.m. In FIG. 1, X1, X2, . . . , XN are the X-axis addresses on the stage corresponding to each pixel (the X-direction position of the center of the beam), while Y1, Y2, . . . , YN are the Y-axis addresses on the stage corresponding to each pixel (the Y-direction position of the center of the beam). An image processor performs the above-described comparison of pairs of signals corresponding to pixels to extract defects.
In the above scheme, the time required for scanning is established by the beam diameter R which is required to achieve the desired inspection sensitivity (and the scanning pitch which this establishes) and the S/N ratio of the signal captured at the pixel 14.
The above-noted S/N is established by the amount of current in the incident electron beam. Therefore, in the defect detection method of the prior art as described above, by making the beam current large, it is possible to detect defects with a sufficiently high contrast.
However, for the following reason, the amount of beam current is limited. Specifically, the object being observed is the pattern formed on the wafer surface and because, as is well known, most of the pattern formed on the wafer surface consists of insulating material, it is necessary to prevent an electrical charge from developing on this insulating material during observation. More specifically, observation is performed at small energy levels of 1 keV or lower. Because of the low primary electron energy, the aberration characteristics of the lens deteriorates, and there is a serious problem with a drop in the S/N ratio (lowering of contrast) caused by the decrease in the injected number of electrons.
To avoid this problem and maintain the maximum detection sensitivity, it is desirable to either make the scanning of the beam slow, so that the amount of time the beam, which corresponds to a pixel, remains in one position is lengthened, thereby increasing the number of injected electrons per pixel, or to scan a given single pixel repeatedly, performing accumulation processing to improve the S/N ratio. In either case, however, the result is that the inspection time is greatly increased.